This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 11-049171, filed Feb. 25, 1999, the entire contents of which are incorporated herein by reference.
The present invention relates to a probing card used in checking the electrical characteristic of an object to be checked.
In the case where checking is made for the electrical characteristics of many electrical elements (IC chips of memory circuits, logic circuits, etc.) formed on a to-be-checked object (for example, semiconductor wafer-hereinafter referred to simply as a wafer), a probing card can be used as a contactor. The probing card allows a transfer of a checking signal between a tester connected to the probing card and an electrical element by setting its probe pins in a state contacting with electrode pads of the electrical element on the wafer. The probing card was so arranged as to correspond to, for example, a plurality of electrode pads of the electrical element on the wafer. The probing card has a plurality of wire type probes, and the probe pins of the respective probes and electrode pads are electrically connected together.
In recent years, with a higher and higher integration density of such an IC chip, the number of electrode pads on the IC chip has been rapidly increased and the array of the electrode pads has been increasingly narrower in pitch. With this trend, the number of probes of the probing card has also been rapidly increased and their array has been correspondingly made narrower in pitch. With a recent increase in the size of the wafer, the number of IC chips to be formed in a single wafer has been rapidly increased and it has been taken a long time to check respective IC chips. Therefore, an important task is to reduce this checking time. In the checking by the probing card, a plurality of IC chips are checked at a time in many cases instead of individually checking them on a one-to-one basis. By increasing the number of IC chips to be checked once at a time (once-at-a-time checking IC""s), a checking time is shortened. As an example of a probing card handling an increasing number of pins and an increase of the once-at-a-time checking ICs, there is a membrane type probing card having bump-like probes. This kind of probing card can be made higher in integration density so as to correspond to miniaturized IC chips but the probe itself has no elasticity. For this reason, when the probe is made higher in integration density and probe-to-probe dimension becomes very shorter, it is difficult to let the membrane follow a high/low difference between the respective electrode pads. As a result, there is a problem that it becomes difficult to secure stable contact between the probe and the electrode pad of the IC chip.
U.S. Pat. No. 5,828,226 describes an example of a probing card solving the above-mentioned problem of the membrane type probing card. A probe 10 of this probing card has, as shown in FIG. 7, a post 12 mounted upright on a substrate 11 and a beam 13 supported by the post 12 in a cantilevered state. The high/low difference of the electrode pads P of an IC chip T is absorbed by an elastic deformation of the beam 13.
The probing card described in the U.S. Pat. No. 5,828,226 enables the IC chips to be formed in a high integration density and secures better contact with the electrode pad. Since, however, the beam 13 is extended from the post 12, the array of probes 10 has to be so designed as to prevent interference (contact) with an adjacent probe 10 when the probes 10 are arranged. This arrangement had a limitation to securing a high integration density structure.
The present invention has been achieved to solve the above-mentioned problems.
An object of the present invention is to provide a probing card which can achieve a high integration density of probes and increase the number of them in accordance with an array of electrodes higher in density and greater in number resulting from a higher integration density of elements (electrical elements on a to-be-checked object) and an increase in the number of once-at-a-time checking elements (ICs).
Another object of the present invention is to provide a probing card which can set all probes in a state positively contacting with corresponding electrodes of an element and effect checking with high reliability.
In one aspect of the present invention, there is provided a probing card for checking electrical characteristics of electrical elements by contacting a plurality of probe pins with these electrical elements formed on an object to be checked, comprising a substrate and a plurality of probes mounted on the substrate, the probe having a post-like projection provided on the substrate, a volute-like plate having one end fixed to the post-like projection and the other end formed as an elastic free end, and a probe pin fixed to the other end side of the volute-like plate.
In the probing card, the one-end side of the volute-like plate is preferably fixed to the post-like projection through a spacer.
In the probing card, respective probes are preferably arranged at such an interval that their volute-like plates are not contacted with each other.
In the probing card, the volute-like plate preferably has a volute structure in which its high frequency characteristic is not inhibited.
In the probing card, the probe pin is preferably arranged on the other end side of the volute-like plate such that the probe pin is situated in a space on a top end face of the post-like projection.
In the probing card, it is preferable that an outer side end of the volute-like plate be fixed to the post-like projection and an inner side end of the volute-like plate be formed as the free end.
In the probing card, the probe pin preferably has a projection of a conical or prismatic structure.
In the probing card, the post-like projection is so formed as to have a horizontal cross-section width dimension of a few tens to a few hundreds of xcexcm.
In a second aspect of the present invention, there is provided a probing card for checking the electrical characteristics of integrated circuits by contacting a plurality of probe pins with electrode pads of these integrated circuits formed on a semiconductor wafer, comprising a substrate and a plurality of probes provided on the substrate, the respective probe having a post-like projection provided on the substrate, a spacer provided on the post-like projection, a volute-like plate having one end fixed to the spacer and the other end formed as an elastic free end, and a probe pin fixed to the other end side of the volute-like plate.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.